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https://dblp.org/pid/81/1583 +
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http://purl.org/net/nknouf/ns/bibtex#Article +
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https://dblp.org/pid/81/1583 +
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https://doi.org/10.1109/TVLSI.2009.2019279 +
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https://doi.org/10.1109/TVLSI.2009.2019279 +
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https://dblp.org/db/journals/tvlsi/tvlsi18 +
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6
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887-900
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https://doi.org/10.1109/TVLSI.2009.2019279 +
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IEEE Trans. Very Large Scale Integr. Syst.
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IEEE Trans. Very Large Scale Integr. Syst.
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18
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6
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https://dblp.org/streams/journals/tvlsi +
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SRAM Read/Write Margin Enhancements Using FinFETs.
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2010
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https://doi.org/10.1109/TVLSI.2009.2019279 +
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Andrew Carlson et al.: SRAM Read/Write Margin Enhancements Using FinFETs. (2010)
|
