| https://dblp.org/rdf/schema#authoredBy
|
https://dblp.org/pid/135/9680 +
, https://dblp.org/pid/241/6601 +
, https://dblp.org/pid/52/323 +
, https://dblp.org/pid/241/6595 +
, https://dblp.org/pid/154/0687 +
, https://dblp.org/pid/142/4431 +
|
| https://dblp.org/rdf/schema#bibtexType
|
http://purl.org/net/nknouf/ns/bibtex#Article +
|
| https://dblp.org/rdf/schema#createdBy
|
https://dblp.org/pid/135/9680 +
, https://dblp.org/pid/241/6601 +
, https://dblp.org/pid/52/323 +
, https://dblp.org/pid/241/6595 +
, https://dblp.org/pid/154/0687 +
, https://dblp.org/pid/142/4431 +
|
| https://dblp.org/rdf/schema#documentPage
|
https://doi.org/10.1142/S0218126620500759 +
|
| https://dblp.org/rdf/schema#doi
|
https://doi.org/10.1142/S0218126620500759 +
|
| https://dblp.org/rdf/schema#listedOnTocPage
|
https://dblp.org/db/journals/jcsc/jcsc29 +
|
| https://dblp.org/rdf/schema#numberOfCreators
|
6
|
| https://dblp.org/rdf/schema#pagination
|
2050075:1-2050075:20
|
| https://dblp.org/rdf/schema#primaryDocumentPage
|
https://doi.org/10.1142/S0218126620500759 +
|
| https://dblp.org/rdf/schema#publishedIn
|
J. Circuits Syst. Comput.
|
| https://dblp.org/rdf/schema#publishedInJournal
|
J. Circuits Syst. Comput.
|
| https://dblp.org/rdf/schema#publishedInJournalVolume
|
29
|
| https://dblp.org/rdf/schema#publishedInJournalVolumeIssue
|
5
|
| https://dblp.org/rdf/schema#publishedInStream
|
https://dblp.org/streams/journals/jcsc +
|
| https://dblp.org/rdf/schema#title
|
A High Throughput and Pipelined Implementation of the LUKS on FPGA.
|
| https://dblp.org/rdf/schema#yearOfPublication
|
2020
|
| owl:sameAs |
https://doi.org/10.1142/S0218126620500759 +
, http://dx.doi.org/10.1142/S0218126620500759 +
|
| rdf:type |
https://dblp.org/rdf/schema#Publication +
, https://dblp.org/rdf/schema#Article +
|
| rdfs:label |
Xiaochao Li et al.: A High Throughput and Pipelined Implementation of the LUKS on FPGA. (2020)
|
