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Https://dblp.org/rec/journals/jacm/Bryant91
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https://dblp.org/rec/journals/jacm/Bryant91
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https://dblp.org/rdf/schema#numberOfCreators 1
https://dblp.org/rdf/schema#pagination 299-328
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https://dblp.org/rdf/schema#publishedIn J. ACM
https://dblp.org/rdf/schema#publishedInJournal J. ACM
https://dblp.org/rdf/schema#publishedInJournalVolume 38
https://dblp.org/rdf/schema#publishedInJournalVolumeIssue 2
https://dblp.org/rdf/schema#title A Methodology for Hardware Verification Based on Logic Simulation.
https://dblp.org/rdf/schema#yearOfPublication 1991
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rdfs:label Randal E. Bryant: A Methodology for Hardware Verification Based on Logic Simulation. (1991)
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