| https://dblp.org/rdf/schema#authoredBy
|
https://dblp.org/pid/234/8066 +
, https://dblp.org/pid/51/8055 +
, https://dblp.org/pid/234/8075 +
, https://dblp.org/pid/04/7805 +
, https://dblp.org/pid/78/4433 +
|
| https://dblp.org/rdf/schema#bibtexType
|
http://purl.org/net/nknouf/ns/bibtex#Article +
|
| https://dblp.org/rdf/schema#createdBy
|
https://dblp.org/pid/234/8066 +
, https://dblp.org/pid/51/8055 +
, https://dblp.org/pid/234/8075 +
, https://dblp.org/pid/04/7805 +
, https://dblp.org/pid/78/4433 +
|
| https://dblp.org/rdf/schema#documentPage
|
https://doi.org/10.1007/S00034-018-0844-2 +
|
| https://dblp.org/rdf/schema#doi
|
https://doi.org/10.1007/S00034-018-0844-2 +
|
| https://dblp.org/rdf/schema#listedOnTocPage
|
https://dblp.org/db/journals/cssp/cssp38 +
|
| https://dblp.org/rdf/schema#numberOfCreators
|
5
|
| https://dblp.org/rdf/schema#pagination
|
118-137
|
| https://dblp.org/rdf/schema#primaryDocumentPage
|
https://doi.org/10.1007/S00034-018-0844-2 +
|
| https://dblp.org/rdf/schema#publishedIn
|
Circuits Syst. Signal Process.
|
| https://dblp.org/rdf/schema#publishedInJournal
|
Circuits Syst. Signal Process.
|
| https://dblp.org/rdf/schema#publishedInJournalVolume
|
38
|
| https://dblp.org/rdf/schema#publishedInJournalVolumeIssue
|
1
|
| https://dblp.org/rdf/schema#publishedInStream
|
https://dblp.org/streams/journals/cssp +
|
| https://dblp.org/rdf/schema#title
|
FPGA-Based Real-Time Implementation of Bivariate Empirical Mode Decomposition.
|
| https://dblp.org/rdf/schema#yearOfPublication
|
2019
|
| owl:sameAs |
https://doi.org/10.1007/S00034-018-0844-2 +
, http://dx.doi.org/10.1007/S00034-018-0844-2 +
|
| rdf:type |
https://dblp.org/rdf/schema#Publication +
, https://dblp.org/rdf/schema#Article +
|
| rdfs:label |
Qasim Waheed Malik et al.: FPGA-Based Real-Time Implementation of Bivariate Empirical Mode Decomposition. (2019)
|
