| https://dblp.org/rdf/schema#authoredBy
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https://dblp.org/pid/65/4423 +
, https://dblp.org/pid/47/7029 +
, https://dblp.org/pid/47/6720 +
, https://dblp.org/pid/g/GuangRGao +
, https://dblp.org/pid/s/VivekSarkar +
|
| https://dblp.org/rdf/schema#bibtexType
|
http://purl.org/net/nknouf/ns/bibtex#Inproceedings +
|
| https://dblp.org/rdf/schema#createdBy
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https://dblp.org/pid/65/4423 +
, https://dblp.org/pid/47/7029 +
, https://dblp.org/pid/47/6720 +
, https://dblp.org/pid/g/GuangRGao +
, https://dblp.org/pid/s/VivekSarkar +
|
| https://dblp.org/rdf/schema#documentPage
|
https://doi.org/10.1007/978-3-642-15291-7_31 +
|
| https://dblp.org/rdf/schema#doi
|
https://doi.org/10.1007/978-3-642-15291-7_31 +
|
| https://dblp.org/rdf/schema#listedOnTocPage
|
https://dblp.org/db/conf/europar/europar2010-2 +
|
| https://dblp.org/rdf/schema#numberOfCreators
|
5
|
| https://dblp.org/rdf/schema#pagination
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341-352
|
| https://dblp.org/rdf/schema#primaryDocumentPage
|
https://doi.org/10.1007/978-3-642-15291-7_31 +
|
| https://dblp.org/rdf/schema#publishedAsPartOf
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https://dblp.org/rec/conf/europar/2010-2 +
|
| https://dblp.org/rdf/schema#publishedIn
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Euro-Par (2)
|
| https://dblp.org/rdf/schema#publishedInBook
|
Euro-Par (2)
|
| https://dblp.org/rdf/schema#publishedInStream
|
https://dblp.org/streams/conf/europar +
|
| https://dblp.org/rdf/schema#title
|
A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures.
|
| https://dblp.org/rdf/schema#yearOfEvent
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2010
|
| https://dblp.org/rdf/schema#yearOfPublication
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2010
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https://doi.org/10.1007/978-3-642-15291-7_31 +
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|
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https://dblp.org/rdf/schema#Publication +
, https://dblp.org/rdf/schema#Inproceedings +
|
| rdfs:label |
Chen Chen et al.: A Study of a Software Cache Implementation of the OpenMP Memory Model for Multicore and Manycore Architectures. (2010)
|
