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Https://dblp.org/rec/conf/IEEEpact/KirianskyXRA18
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https://dblp.org/rec/conf/IEEEpact/KirianskyXRA18
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https://dblp.org/rdf/schema#title Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP.
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rdfs:label Vladimir Kiriansky et al.: Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP. (2018)
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